【Spotlight】Revolutionizing AI Chips: Fusion Bonding Explained

Among the cutting-edge semiconductor technologies, 3D integration technology significantly influences the future of semiconductor performance alongside miniaturization. This article explains Fusion Bonding, a core technology in this field.

About Wafer Bonding Technology

With the growing adoption and expanded applications of semiconductor devices, there is an increasing demand for multifunctionality and heterointegration in devices. Wafer bonding technology is drawing attention as an enabler of heterogeneous integration that combines various materials and functionalities.

Wafer bonding technology is essential for manufacturing advanced devices such as 3D integrated circuits (3D ICs) used in high-end general-purpose AI, new types of MEMS devices and sensors for automotive, healthcare, and smart devices, and optical devices.

Initially, wafer bonding technology was adopted in applications like MEMS, sensor technology, and Silicon-on-Insulator (SOI) wafers. Following its success in these areas, wafer bonding technology expanded its application range to other fields.

Today, it is utilized in complex, high-performance applications such as advanced semiconductor devices, optical communication devices, and 3D integrated circuits (3D ICs). The evolution of wafer bonding technology has accelerated innovation in the semiconductor industry, enabling the development of new devices and systems.

There are two types of wafer bonding: direct bonding, which directly bonds wafers, and indirect bonding, which uses an intermediate layer. The appropriate method is selected based on the application’s requirements and process demands.

Types of Wafer Bonding Methods

Features of Fusion Bonding

Fusion Bonding, a direct bonding technology, has been gaining attention in recent years, particularly in device stacking.

Fusion Bonding achieves robust bonding by directly connecting two semiconductor wafers at the atomic level.

There are two main methods of Fusion Bonding:

1. Wet Bonding: This method forms an oxide layer on Si substrates, makes them hydrophilic, and temporarily bonds them at room temperature. High-temperature processing (up to 1200°C) then strengthens the bond. This method is primarily used in manufacturing Silicon-on-Insulator (SOI) wafers.
2. Plasma Bonding: This method uses plasma to activate the wafer surfaces before bonding. Unlike wet bonding, it enables bonding at low temperatures (250–350°C).

Due to its low-temperature bonding capability, plasma bonding can firmly bond wafers without damaging the devices. In recent years, it has been increasingly adopted in wafer stacking for CIS (CMOS Image Sensors) and memory.

Plasma bonding is also expected to be adopted for Hybrid Bonding, a bonding technique used in 3D IC applications, leveraging its low-temperature bonding characteristics.

Challenges and Prospects of Fusion Bonding

Plasma bonding in Fusion Bonding is gaining attention as a critical technology for 3D ICs due to its low-temperature bonding capability. Below are the challenges and future prospects of adopting this technology in 3D ICs:

Challenges in Adoption

1. Interface Quality Management: Plasma activation bonding significantly depends on the quality of the bonding interface. Maintaining uniformity in wafer surface treatment and plasma processing over large areas is critical.
2. Bubble and Impurity Removal: Low-temperature bonding tends to leave bubbles or impurities at the bonding interface. Developing technologies to effectively remove these elements is essential for achieving high-density bonding.
3. Material Selectivity: Plasma activation bonding is highly effective for specific materials but presents challenges when bonding dissimilar materials. Optimization for varying material properties is required.
4. Process Complexity and Cost: Plasma processing equipment is relatively expensive, and the process itself is complex. Improving cost efficiency and simplifying the process are critical for mass production.

Future Prospects

1. Advancement of Process Technology: Research and development are expected to enhance plasma activation bonding processes, forming higher-quality interfaces and achieving low-cost manufacturing.
2. Application to New Materials: As 3D ICs employ various materials, efforts are underway to extend plasma activation bonding to a broader range of materials.
3. Further Reduction of Bonding Temperatures: Research aims to lower bonding temperatures further, enabling integration of more heat-sensitive devices.
4. Enhancing Multi-Functionality and Performance: Plasma activation bonding can support the development of 3D IC devices with higher functionality and performance, such as faster data transmission, lower power consumption, and miniaturization.

The progress in plasma activation bonding technology will play a crucial role in advancing 3D IC technology and is expected to find broader applications in the future.

Through overcoming technical challenges and optimizing processes, innovation in this field will likely accelerate.

Glossary

• Silicon-On-Insulator (SOI): A semiconductor manufacturing technique placing a silicon layer over an insulator (typically silicon dioxide) to reduce parasitic capacitance, enhance speed, and lower power consumption.
• CIS: CMOS Image Sensors convert light into electrical signals and are widely used in cameras for digital devices like smartphones.
• Hybrid Bonding: A nanoscale bonding technology combining metal and insulator for direct connections between semiconductor chips or wafers, enabling high-density interconnects.

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